/*
 * Copyright (c) 2020-2021, SERI Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2022-05-22     Lyons        first version
 */

module pa_fpu_xfrac_post_shift_left_h (
    expn_adjust_i,
    xfrac_rnd_i,
    xfrac_rnd_o
    );

//width of xfrac_rnd is 57-bits
//include: hidden:1 + frac:52 + grs:3

input               expn_adjust_i;
input               xfrac_rnd_i;
output              xfrac_rnd_o;

wire [3:0]          expn_adjust_i;
wire [56:0]         xfrac_rnd_i;
wire [56:0]         xfrac_rnd_o;


reg  [56:0]         xfrac_rnd_out;

wire [3:0]          shift_cnt;
wire [56:0]         shift_pre_data;


assign shift_cnt[3:0] = expn_adjust_i[3:0];
assign shift_pre_data[56:0] = xfrac_rnd_i[56:0];

always @ (shift_cnt[3:0] or shift_pre_data[56:0]) begin
case (shift_cnt[3:0])
    4'd0  : xfrac_rnd_out[56:0] =  shift_pre_data[56:0];
    4'd1  : xfrac_rnd_out[56:0] = {shift_pre_data[52:0],  4'b0};
    4'd2  : xfrac_rnd_out[56:0] = {shift_pre_data[48:0],  8'b0};
    4'd3  : xfrac_rnd_out[56:0] = {shift_pre_data[44:0], 12'b0};
    4'd4  : xfrac_rnd_out[56:0] = {shift_pre_data[40:0], 16'b0};
    4'd5  : xfrac_rnd_out[56:0] = {shift_pre_data[36:0], 20'b0};
    4'd6  : xfrac_rnd_out[56:0] = {shift_pre_data[32:0], 24'b0};
    4'd7  : xfrac_rnd_out[56:0] = {shift_pre_data[28:0], 28'b0};
    4'd8  : xfrac_rnd_out[56:0] = {shift_pre_data[24:0], 32'b0};
    4'd9  : xfrac_rnd_out[56:0] = {shift_pre_data[20:0], 36'b0};
    4'd10 : xfrac_rnd_out[56:0] = {shift_pre_data[16:0], 40'b0};
    4'd11 : xfrac_rnd_out[56:0] = {shift_pre_data[12:0], 44'b0};
    4'd12 : xfrac_rnd_out[56:0] = {shift_pre_data[8:0],  48'b0};
    4'd13 : xfrac_rnd_out[56:0] = {shift_pre_data[4:0],  52'b0};
    4'd14 : xfrac_rnd_out[56:0] = {shift_pre_data[0],    56'b0};
    default :
            xfrac_rnd_out[56:0] = {57{1'b0}};
endcase
end

assign xfrac_rnd_o[56:0] = xfrac_rnd_out[56:0];

endmodule